Thomas J. Chaney

According to our database, Thomas J. Chaney authored at least 6 papers between 1967 and 1997.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1997

Design of a Gigabit ATM Switch.

Thomas J. Chaney, J. Andrew Fingerhut, Margaret Flucke, Jonathan S. Turner

Proceedings of the Proceedings IEEE INFOCOM '97, 1997

1988

<i>Q</i>-Modules: Internally Clocked Delay-Insensitive Modules.

Fred U. Rosenberger, Charles E. Molnar, Thomas J. Chaney, Ting-Pien Fang

IEEE Trans. Computers, 1988

1983

Measured Flip-Flop Responses to Marginal Triggering.

Thomas J. Chaney

IEEE Trans. Computers, 1983

1979

Comments on "A Note on Synchronizer or Interlock Maloperation".

Thomas J. Chaney

IEEE Trans. Computers, 1979

1973

Anomalous Behavior of Synchronizer and Arbiter Circuits.

Thomas J. Chaney, Charles E. Molnar

IEEE Trans. Computers, 1973

1967

Engineering design of macromodules.

Asher Blum, Thomas J. Chaney, Richard E. Olson

Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '67 Spring Joint Computer Conference, 1967