Ti-Yen Yen

According to our database, Ti-Yen Yen authored at least 8 papers between 1993 and 1997.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1997

A Real-Time RTL Engineering-Change Method Supporting On-Line Debugging for Logic-Emulation Applications.

Wen-Jong Fang, Allen C.-H. Wu, Ti-Yen Yen

Proceedings of the 34st Conference on Design Automation, 1997

DP-Gen: a datapath generator for multiple-FPGA applications.

Wen-Jong Fang, Allen C.-H. Wu, Ti-Yen Yen, Tsair-Chin Lin

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

An efficient graph algorithm for FSM scheduling.

Ti-Yen Yen, Wayne H. Wolf

IEEE Trans. Very Large Scale Integr. Syst., 1996

1995

Sensitivity-driven co-synthesis of distributed embedded systems.

Ti-Yen Yen, Wayne H. Wolf

Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995

Performance estimation for real-time distributed embedded systems.

Ti-Yen Yen, Wayne H. Wolf

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

Communication synthesis for distributed embedded systems.

Ti-Yen Yen, Wayne H. Wolf

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

Efficient algorithms for interface timing verification.

Ti-Yen Yen, Wayne H. Wolf, Albert E. Casavant, Alex Ishii

Proceedings of the Proceedings EURO-DAC'94, 1994

1993

Optimal Scheduling of Finite-State Machines.

Ti-Yen Yen, Wayne H. Wolf

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993