Toru Shiomi

According to our database, Toru Shiomi authored at least 3 papers between 1991 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1999

A 500-MHz pipelined burst SRAM with improved SER immunity.

Hirotoshi Sato, Tomohisa Wada, Shigeki Ohbayashi, Kunihiko Kozaru, Yasuyuki Okamoto, Yoshiko Higashide, Tadayuki Shimizu, Yukio Maki, Rui Morimoto, Hisakazu Otoi, Tsuyoshi Koga, Hiroki Honda, Makoto Taniguchi, Yutaka Arita, Toru Shiomi

IEEE J. Solid State Circuits, 1999

1993

A 5.8-ns 256-Kb BiCMOS TTL SRAM with T-Shaped bit line architecture.

Toru Shiomi, Tomohisa Wada, Shigeki Ohbayashi, Atsushi Ohba, Hiroki Honda, Yoshiyuki Ishigaki, Shiro Hine, Kenji Anami, Kimio Suzuki, Tadashi Sumi

IEEE J. Solid State Circuits, December, 1993

1991

A 7 ns 1 Mb BiCMOS ECL SRAM with shift redundancy.

Atsushi Ohba, Shigeki Ohbayashi, Toru Shiomi, Satoshi Takano, Kenji Anami, Hiroki Honda, Yoshiyuki Ishigaki, Masahiro Hatanaka, Shigeo Nagao, Shimpei Kayano

IEEE J. Solid State Circuits, April, 1991