Toshihiko Hirose

According to our database1, Toshihiko Hirose authored at least 2 papers between 1990 and 1991.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1991
An 8 ns 4 Mb serial access memory.
IEEE J. Solid State Circuits, April, 1991

1990
A 20-ns 4-Mb CMOS SRAM with hierarchical word decoding architecture.
IEEE J. Solid State Circuits, October, 1990


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