Tran Ngoc Thinh

This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.

Bibliography

2025
ADMEdge: Accelerating Edge Computing Through Co-design for Enhanced Data Mobility.
Proceedings of the Intelligent Information and Database Systems - 17th Asian Conference, 2025

2024
Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme.
Inf., July, 2024

A Resource-Efficient Multi-core Multi-thread RISC-V-based System-on-Chip.
Proceedings of the 21st International SoC Design Conference, 2024

2023
A flexible and efficient FPGA-based random forest architecture for IoT applications.
Internet Things, July, 2023

HH-NIDS: Heterogeneous Hardware-Based Network Intrusion Detection Framework for IoT Security.
Future Internet, 2023

High-performance anomaly intrusion detection system with ensemble neural networks on reconfigurable hardware.
Concurr. Comput. Pract. Exp., 2023

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor.
IEEE Access, 2023

FPGA-Enabled Efficient Framework for High-Performance Intrusion Prevention Systems.
Proceedings of the Computational Science and Its Applications - ICCSA 2023 Workshops, 2023

2022
Towards An FPGA-targeted Hardware/Software Co-design Framework for CNN-based Edge Computing.
Mob. Networks Appl., 2022

Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA.
Cryptogr., 2022

A CNN-Based Vehicle Identification Solution in Parking System With Hardware Accelerator on FPGA.
Proceedings of the RIVF International Conference on Computing and Communication Technologies, 2022

2021
A high-performance FPGA-based BWA-MEM DNA sequence alignment.
Concurr. Comput. Pract. Exp., 2021

Air Quality Monitoring Systems with Multiple Data Sources for Ho Chi Minh City.
EAI Endorsed Trans. Context aware Syst. Appl., 2021

Hardware/Software Co-design for Convolutional Neural Networks Acceleration: A Survey and Open Issues.
Proceedings of the Context-Aware Systems and Applications, 2021

2020
Heterogeneous Hardware-based Network Intrusion Detection System with Multiple Approaches for SDN.
Mob. Networks Appl., 2020

2019
A Combination of Temporal Sequence Learning and Data Description for Anomaly-based NIDS.
CoRR, 2019

High-Throughput Machine Learning Approaches for Network Attacks Detection on FPGA.
Proceedings of the Context-Aware Systems and Applications, and Nature of Computation and Communication, 2019

2018
An Efficient High-Throughput and Low-Latency SYN Flood Defender for High-Speed Networks.
Secur. Commun. Networks, 2018

ODL-ANTIFLOOD: A Comprehensive Solution For Securing OpenDayLight Controller.
Proceedings of the 2018 International Conference on Advanced Computing and Applications, 2018

An FPGA-Based Seed Extension IP Core for BWA-MEM DNA Alignment.
Proceedings of the 2018 International Conference on Advanced Computing and Applications, 2018

2017
A Scalable FPGA-based Floating-Point Gaussian Filtering Architecture.
Proceedings of the International Conference on Advanced Computing and Applications, 2017

2016
FPGA-based Multicore Architecture for Integrating Multiple DDoS Defense Mechanisms.
SIGARCH Comput. Archit. News, 2016

An Anomaly-based Intrusion Detection Architecture Integrated on OpenFlow Switch.
Proceedings of the 6th International Conference on Communication and Network Security, 2016

A Secured OpenFlow-Based Switch Architecture.
Proceedings of the 2016 International Conference on Advanced Computing and Applications, 2016

2015
Accelerating Anomaly-Based IDS Using Neural Network on GPU.
Proceedings of the 2015 International Conference on Advanced Computing and Applications, 2015

2014
mDFA: A Memory Efficient DFA-Based Pattern Matching Engine on FPGA.
Wirel. Pers. Commun., 2014

Memory-Based Multi-pattern Signature Scanning for ClamAV Antivirus.
Proceedings of the Future Data and Security Engineering - First International Conference, 2014

2013
ENREM: An efficient NFA-based regular expression matching engine on reconfigurable hardware for NIDS.
J. Syst. Archit., 2013

2011
Memory-efficient TCP reassembly using FPGA.
Proceedings of the 2011 Symposium on Information and Communication Technology, 2011

Optimization of Regular Expression Processing Circuits for NIDS on FPGA.
Proceedings of the Second International Conference on Networking and Computing, 2011

BBFEX: a bloom-bloomier filter extension for long patterns in FPGA-based pattern matching system (abstract only).
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2010
Massively Parallel Cuckoo Pattern Matching Applied for NIDS/NIPS.
Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010

2009
PAMELA: Pattern Matching Engine with Limited-Time Update for NIDS/NIPS.
IEICE Trans. Inf. Syst., 2009

2007
Applying Cuckoo Hashing for FPGA-based Pattern Matching in NIDS/NIPS.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

FPGA-Based Cuckoo Hashing for Pattern Matching in NIDS/NIPS.
Proceedings of the Managing Next Generation Networks and Services, 2007

2006
Manifold similarity search of DNA sequences with reconfigurable hardware.
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006


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