U. Dilna

Orcid: 0000-0003-1515-4363

According to our database1, U. Dilna authored at least 1 paper in 2024.

Collaborative distances:
  • Dijkstra number2 of seven.
  • Erdős number3 of six.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
An Accelerated Variable Stage Size Carry Skip Adder Realization Using 1S1R Resistive Memory.
Int. J. Inf. Technol. Decis. Mak., May, 2024


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