Usha Bhanu Nageswaran

According to our database, Usha Bhanu Nageswaran authored at least 3 papers between 2012 and 2016.

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2016

VLSI architectures for high speed and low power implementation of 5/3 lifting discrete wavelet transform.

Usha Bhanu Nageswaran, A. Chilambuchelvan

Int. J. Comput. Sci. Eng., 2016

2012

High speed VLSI implementation of lifting based DWT.

Usha Bhanu Nageswaran, A. Chilambuchelvan

Proceedings of the 2012 International Conference on Advances in Computing, 2012

VLSI architectures for lifting based DWT: a detailed survey.

Usha Bhanu Nageswaran, A. Chilambuchelvan

Proceedings of the 2012 International Conference on Advances in Computing, 2012