Väinö Hakkarainen

According to our database, Väinö Hakkarainen authored at least 5 papers between 2002 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2007

A 10-bit, 1.8-GS/s Time-Interleaved Pipeline ADC.

Väinö Hakkarainen, Arto Rantala, Mikko Aho, Jaana Riikonen, David Gomes-Martin, Markku Åberg, Kari Halonen

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2005

A 10-bit 400-MS/s 170 mW 4-times interleaved A/D converter in 0.35µm BiCMOS.

Jaana Riikonen, Mikko Aho, Väinö Hakkarainen, Kari Halonen, Lauri Sumanen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

An IF-sampling timing skew-insensitive parallel S/H circuit.

Mikko Aho, Väinö Hakkarainen, Lauri Sumanen, Mikko Waltari, Kari Halonen

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

A self-calibration technique for time-interleaved pipeline ADCs.

Väinö Hakkarainen, Lauri Sumanen, Mikko Aho, Mikko Waltari, Kari Halonen

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

CMOS dynamic comparators for pipeline A/D converters.

Lauri Sumanen, Mikko Waltari, Väinö Hakkarainen, Kari Halonen

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002