Viresh Rustagi

According to our database1, Viresh Rustagi authored at least 4 papers between 1995 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2003
Calisto: A Low-Power Single-Chip Multiprocessor Communications Platform.
IEEE Micro, 2003

2000
Supporting Timing Analysis by Automatic Bounding of Loop Iterations.
Real Time Syst., 2000

1998
Bounding Loop Iterations for Timing Analysis.
Proceedings of the Fourth IEEE Real-Time Technology and Applications Symposium, 1998

1995
MiThOS - A Real-Time Micro-Kernel Threads Operating System.
Proceedings of the 16th IEEE Real-Time Systems Symposium, 1995


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