Vladimir Vityazev

Orcid: 0000-0003-3558-6008

According to our database1, Vladimir Vityazev authored at least 16 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
FPGA Implementation of LDPC Decoder Architecture for Wireless Communication Standards.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

The Problem of Debris Detection with Automotive 77-GHz FMCW Radar.
Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

2020
FPGA Implementation of LDPC Encoder Architecture for Wireless Communication Standards.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Implementation of Stereo Rig Roll Angle Estimation on a TMS320C6678 DSP.
Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

2019
Importance Sampling Based Software Kit for LLR BP Decoding Simulation.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Resolution Improvement in Ground-Mapping Car-Borne Radar Imaging Systems.
Proceedings of the 2019 IEEE International Conference on Imaging Systems and Techniques, 2019

2018
LDPC decoder implementation on DSP+ARM platform with OpenCL.
Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018

An Approach to Autofocus in Car-borne Radar Imaging Systems.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017
Modulus processing autofocus.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

Teaching multi-core DSP implementation on EVM C6678 board.
Proceedings of the 25th European Signal Processing Conference, 2017

2016
Development and testing of the voice activity detector based on use of special pilot signal.
Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016

Self-corrected UMP-APP decoding of LDPC codes.
Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016

2015
Using self-correction for min-sum based decoding algorithms of LDPC codes.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015

TMS320C66x multicore DSP efficiency in radar imaging applications.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015

2014
Min-sum algorithm-structure based decoding algorithms for LDPC codes.
Proceedings of the 3rd Mediterranean Conference on Embedded Computing, 2014

Parallel form of FIR filter for implementation on multicore DSP.
Proceedings of the 3rd Mediterranean Conference on Embedded Computing, 2014


  Loading...