Wei-Siang Su

According to our database, Wei-Siang Su authored at least 2 papers between 2013 and 2016.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2016

A 0.52/1 V Fast Lock-in ADPLL for Supporting Dynamic Voltage and Frequency Scaling.

Ching-Che Chung, Wei-Siang Su, Chi-Kuang Lo

IEEE Trans. Very Large Scale Integr. Syst., 2016

2013

A 0.5V/1.0V fast lock-in ADPLL for DVFS battery-powered devices.

Ching-Che Chung, Duo Sheng, Wei-Siang Su

Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013