Wei Yan
Orcid: 0000-0002-8059-6398Affiliations:
- Chinese Academy of Sciences, Institute of Computing Technology, SKLP, Beijing, China
- Clarkson University, Potsdam, NY, USA (former)
- Washington University in St. Louis, MO, USA (former)
- University of Connecticut, Department of Electrical and Computer Engineering, Storrs, CT, USA (PhD 2018)
According to our database1,
Wei Yan authored at least 26 papers
between 2015 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
Revisiting Edge Perturbation for Graph Neural Network in Graph Data Augmentation and Attack.
IEEE Trans. Knowl. Data Eng., July, 2025
POTA: A Pipelined Oblivious Transfer Acceleration Architecture for Secure Multi-Party Computation.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025
ParTEE: A Framework for Secure Parallel Computing of RISC-V Trusted Execution Environments.
Proceedings of the Euro-Par 2025: Parallel Processing, 2025
Proceedings of the Design, Automation & Test in Europe Conference, 2025
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
MPC-PAT: A Pipeline Architecture for Beaver Triple Generation in Secure Multi-party Computation.
Proceedings of the IEEE International Test Conference in Asia, 2024
Proceedings of the Euro-Par 2024: Parallel Processing, 2024
2021
Cryptogr., 2021
IEEE Consumer Electron. Mag., 2021
2020
PCBChain: Lightweight Reconfigurable Blockchain Primitives for Secure IoT Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2020
A Systematic Approach for Internal Entropy Boosting in Delay-based RO PUF on an FPGA.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Bit<sup>2</sup>RNG: Leveraging Bad-page Initialized Table with Bit-error Insertion for True Random Number Generation in Commodity Flash Memory.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020
FLASH: FPGA Locality-Aware Sensitive Hash for Nearest Neighbor Search and Clustering Application.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
2019
DRAMNet: Authentication based on Physical Unique Features of DRAM Using Deep Convolutional Neural Networks.
CoRR, 2019
2018
DVFT: A Lightweight Solution for Power-Supply Noise-Based TRNG Using Dynamic Voltage Feedback Tuning System.
IEEE Trans. Very Large Scale Integr. Syst., 2018
P2M-based security model: security enhancement using combined PUF and PRNG models for authenticating consumer electronic devices.
IET Comput. Digit. Tech., 2018
2017
DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and Authentication.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
A design flow with integrated verification of requirements and faults in safety-critical systems.
Proceedings of the 12th System of Systems Engineering Conference, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2016
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015