Weiyi Wu

According to our database1, Weiyi Wu authored at least 15 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A scenario-based robust possibilistic-flexible programming model for responsive supply chain network design with a performance-oriented solution methodology.
Expert Syst. Appl., March, 2024

2023
Improving Representation Learning for Histopathologic Images with Cluster Constraints.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

2022
A review on key technologies of invulnerability of software-intensive equipment based on complex network.
Int. J. Model. Simul. Sci. Comput., 2022

2021
Design and Implementation of Hardware in the Loop Simulation Operation Simulator for Complex Mechanical Equipment.
J. Softw., 2021

2020
A Diagnosis Method for the Compound Fault of Gearboxes Based on Multi-Feature and BP-AdaBoost.
Symmetry, 2020

Multi-Ontology Refined Embeddings (MORE): A hybrid multi-ontology and corpus-based semantic representation model for biomedical concepts.
J. Biomed. Informatics, 2020

Deep Learning in Fault Diagnosis of Complex Mechanical Equipment.
Int. J. Perform. Eng., 2020

A Novel Approach for Service Function Chain Dynamic Orchestration in Edge Clouds.
IEEE Commun. Lett., 2020

Multi-Ontology Refined Embeddings (MORE): A Hybrid Multi-Ontology and Corpus-based Semantic Representation for Biomedical Concepts.
CoRR, 2020

2015
Warding off timing attacks in Deterland.
CoRR, 2015

2012
Highly Scalable Parallel Arithmetic Coding on Multi-Core Processors Using LDPC Codes.
IEEE Trans. Commun., 2012

2011
PNTM Integration of Petri Nets and Transactional Memory.
Proceedings of the International Workshop on Petri Nets and Software Engineering, 2011

Transitions as Transactions.
Proceedings of the International Workshop on Petri Nets and Software Engineering, 2011

2010
Reinventing Lock Modeling for Multi-Core Systems.
Proceedings of the MASCOTS 2010, 2010

A Discrete Event Simulation Model for Understanding Kernel Lock Thrashing on Multi-core Architectures.
Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010


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