Wenjuan Zhu

Orcid: 0000-0003-2824-1386

Affiliations:

University of Illinois at Urbana-Champaign, Holonyak Micro and Nanotechnology Laboratory, Urbana, IL, USA
Yale University, Department of Electrical Engineering, New Haven, USA (PhD 2003)

According to our database¹, Wenjuan Zhu authored at least 6 papers between 2002 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

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Bibliography

2024

Modeling of Content addressable memory using 2D Reconfigurable Transistors.

[BibT_eX]

[DOI]

Proceedings of the Device Research Conference, 2024

2022

Nanoscale Devices Based on Two-dimensional and Ferroelectric Materials.

[BibT_eX]

[DOI]

Proceedings of the Device Research Conference, 2022

2019

Ferroelectric Tunneling Junctions for Neurosynaptic Computing.

[BibT_eX]

[DOI]

Proceedings of the Device Research Conference, 2019

2018

HetCore: TFET-CMOS Hetero-Device Architecture for CPUs and GPUs.

[BibT_eX]

[DOI]

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

Ferroelectric Aluminum-Doped Hafnium Oxide for Memory Applications.

[BibT_eX]

[DOI]

Proceedings of the 76th Device Research Conference, 2018

2002

Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go?

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2002

Wenjuan Zhu

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