William H. McAnney

According to our database1, William H. McAnney authored at least 14 papers between 1982 and 1992.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

1992
A Multiple Seed Linear Feedback Shift Register.
IEEE Trans. Computers, 1992

1991
Testing for Coupled Cells in Random-Access Memories.
IEEE Trans. Computers, 1991

1988
Random Pattern Testability of Delay Faults.
IEEE Trans. Computers, 1988

Built-In Checking of the Correct Self-Test Signature.
IEEE Trans. Computers, 1988

Built-in test for RAMs.
IEEE Des. Test, 1988

Identification of Failing Tests with Cycling Registers.
Proceedings of the Proceedings International Test Conference 1988, 1988

1987
Fault Propagation Through Embedded Multiport Memories.
IEEE Trans. Computers, 1987

1986
Pseudorandom Arrays for Built-In Tests.
IEEE Trans. Computers, 1986

1985
Random Pattern Testing for Address-Line Faults in an Embedded Multiport Memory.
Proceedings of the Proceedings International Test Conference 1985, 1985

Random Pattern Testing for Data-Line Faults in an Embedded Multiport Memory.
Proceedings of the Proceedings International Test Conference 1985, 1985

Self-Test of Random Access Memories.
Proceedings of the Proceedings International Test Conference 1985, 1985

1984
Random Testing for Stuck-At Storage Cells in an Embedded Memory.
Proceedings of the Proceedings International Test Conference 1984, 1984

Parallel Pseudorandom Sequences for Built-In Test.
Proceedings of the Proceedings International Test Conference 1984, 1984

1982
Self-Testing of Multichip Logic Modules.
Proceedings of the Proceedings International Test Conference 1982, 1982


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