Wimol San-Um
According to our database1,
Wimol San-Um
authored at least 17 papers
between 2009 and 2019.
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Bibliography
2019
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
Phase difference analysis technique for parametric faults BIST in CMOS analog circuits.
IEICE Electron. Express, 2018
Robustification of a One-Dimensional Generic Sigmoidal Chaotic Map with Application of True Random Bit Generation.
Entropy, 2018
On the First Hyperchaotic Hyperjerk System With No Equilibria: A Simple Circuit for Hidden Attractors.
IEEE Access, 2018
2017
IEICE Electron. Express, 2017
An appraisement of human happiness level based on air quality through fuzzy logic inference system.
Proceedings of the 15th IEEE International Conference on Industrial Informatics, 2017
Sentiment analysis of foreign tourists to Bangkok using data mining through online social network.
Proceedings of the 15th IEEE International Conference on Industrial Informatics, 2017
2016
Data Encryption Scheme Based on Rules of Cellular Automata and Chaotic Map Function for Information Security.
Int. J. Netw. Secur., 2016
The Implementation of a Wireless-remote Arduino-compatible Programmable Logic Controller with Smart User Interface Towards Industrial Internet of Things.
Proceedings of the International Conference on Internet of Things and Big Data, 2016
A Utility Paradigm and Roadmap of Internet-of-Things in Thailand for Digital Economy Development towards ASEAN Economic Community.
Proceedings of the International Conference on Internet of Things and Big Data, 2016
2015
A deterministic node mobility model for mobile Ad Hoc wireless network using Signum-based discrete-time chaotic map.
Proceedings of the International Telecommunication Networks and Applications Conference, 2015
2014
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014
2012
Highly Complex Chaotic System with Piecewise Linear Nonlinearity and Compound Structures.
J. Comput., 2012
2010
A Fault Signature Characterization Based Analog Circuit Testing Scheme and the Extension of IEEE 1149.4 Standard.
IEICE Trans. Inf. Syst., 2010
A low-jitter supply-regulated charge pump phase-locked loop with built-in test and calibration.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Simultaneous impulse stimulation and response sampling technique for built-in self test of linear analog integrated circuits.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009