Wouter Brissinck

According to our database, Wouter Brissinck authored at least 7 papers between 1996 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1999

Scalable Run Time Reconfigurable Architecture.

Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx

Proceedings of the VLSI: Systems on a Chip, 1999

Reconfigurable Programming in the Large on Extendable Uniform Reconfigurable Computing Array's: An Integrated Approach Based on Reconfigurable Virtual Architectures.

Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx

Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998

Analysis of large ATM switches using a platform-independent simulation environment.

Wouter Brissinck, Erik F. Dirkx

J. Syst. Archit., 1998

Simulation of ATM Switches Using Dynamically Reconfigurable FPGAs.

Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx

Proceedings of the Field-Programmable Logic and Applications, 1998

1997

Scheduling and admission control policies: A case study for ATM.

Kris Steenhaut, Kurt Degieter, Wouter Brissinck, Erik F. Dirkx

Comput. Networks ISDN Syst., 1997

1996

Development of PVM Code for a Low Latency Switch Based Interconnect.

Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx

Proceedings of the Parallel Virtual Machine, 1996

The Implementation of a Field Programmable Logic Based Co-Processor for the Acceleration of Discrete Event Simulators.

Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx

Proceedings of the Field-Programmable Logic, 1996