Xiangyu Ran
Orcid: 0000-0002-5436-0066
According to our database1,
Xiangyu Ran
authored at least 2 papers
in 2025.
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Bibliography
2025
An Ultraspeed Middle Voltage and Timing Analyzer With Near-SPICE Accuracy for Charge-Recycling Buses.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2025
ASF-CRB: an Energy-Efficient Activity-Balanced Charge-Recycling Bus Architecture Based on Alternate Signal Flipping.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025