Y. Dilip

According to our database, Y. Dilip authored at least 1 paper in 2018.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2018

FPGA Implementation of an Improved Watchdog Timer for Safety-Critical Applications.

Ravi Krishnan Unni, Vijayanand P., Y. Dilip

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018