Yanyi Liu Wong

Affiliations:
  • University of Maryland, Department of Electrical and Computer Engi-neering, College Park, MD, USA
  • University of Maryland, Institute for Systems Research, College Park, MD, USA


According to our database1, Yanyi Liu Wong authored at least 9 papers between 2004 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
A 750-MHz 6-b Adaptive Floating-Gate Quantizer in 0.35-μm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
A 1.2-GHz Comparator With Adaptable Offset in 0.35- mum CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007
A 144 × 144 Current-Mode Image Sensor With Self-Adapting Mismatch Reduction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

On-Line Histogram Equalization for Flash ADC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
A floating-gate comparator with automatic offset adaptation for 10-bit data conversion.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A 1.2 GHz adaptive floating gate comparator with 13-bit resolution.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 128×128 floating gate imager with self-adapting fixed pattern noise reduction.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Floating gate comparator with automatic offset manipulation functionality.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Adaptive log domain filters using floating gate transistors.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004


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