Yasu Lu
Orcid: 0000-0002-2211-4506
According to our database1,
Yasu Lu
authored at least 8 papers
between 2016 and 2024.
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Bibliography
2024
A Single-Controller-Four-Output Digital LDO With Priority-Time-Multiplexing Scheme and Clamping Loops in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2022
Transfer Function Analysis of the Power Supply Rejection Ratio of Low-Dropout Regulators and the Feed-Forward Ripple Cancellation Scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
2021
A Fast-Transient 500-mA Digitally Assisted Analog LDO With 30-μ V/mA Load Regulation and 0.0073-ps FoM in 65-nm CMOS.
IEEE J. Solid State Circuits, 2021
2020
A Distributed Power Delivery Grid Based on Analog-Assisted Digital LDOs With Cooperative Regulation and IR-Drop Reduction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
2019
Transfer Function Analysis of the Power Supply Rejection Ratio of Capacitor-Less LDOs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Single-Controller-Four-Output Analog-Assisted Digital LDO with Adaptive-Time-Multiplexing Control in 65-nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
A 500mA analog-assisted digital-LDO-based on-chip distributed power delivery grid with cooperative regulation and IR-drop reduction in 65nm CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2016
A comparative analysis on binary and multiple-unary weighted power stage design for digital LDO.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016