Yasushi Matsuyama

According to our database, Yasushi Matsuyama authored at least 3 papers between 1989 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A Moodle-Based E-Syllabus for Institutional Research: Curriculum Mapping and Competency Assessments.

Yoshikazu Asada, Hitoaki Okazaki, Naohiro Sata, Hiroshi Kawahira, Shinichi Yamamoto, Yasushi Matsuyama

Proceedings of the 9th International Congress on Advanced Applied Informatics, 2020

1990

A multibit test trigger circuit for megabit SRAMs.

Fumio Miyaji, Takashi Emori, Yasushi Matsuyama, Yoshikazu Kanaishi, Katsunori Seno, Yoshiaki Hagiwara

IEEE J. Solid State Circuits, February, 1990

1989

A 25-ns 4-Mbit CMOS SRAM with dynamic bit-line loads.

Fumio Miyaji, Yasushi Matsuyama, Yoshikazu Kanaishi, Katsunori Seno, Takashi Emori, Yoshiaki Hagiwara

IEEE J. Solid State Circuits, October, 1989