Yasutake Hirachi

According to our database, Yasutake Hirachi authored at least 4 papers between 2006 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A 60GHz-Band High-Efficiency Antenna with a Thick Resin Layer and Differentially Fed through a Hole in a Silicon Chip.

Naoya Oikawa, Jiro Hirokawa, Hiroshi Nakano, Yasutake Hirachi, Hiroshi Isono, Atsushi Ishii, Makoto Ando

IEICE Trans. Commun., 2016

2013

Manufacture and Performance of a 60GHz-Band High-Efficiency Antenna with a Thick Resin Layer and the Feed through a Hole in a Silicon Chip.

Jun Asano, Jiro Hirokawa, Hiroshi Nakano, Yasutake Hirachi, Hiroshi Isono, Atsushi Ishii, Makoto Ando

IEICE Trans. Commun., 2013

2007

A Cost-Effective Transition between a Microstrip Line and a Post-Wall Waveguide Using a Laminated LTCC Substrate in 60-GHz Band.

Takafumi Kai, Jiro Hirokawa, Makoto Ando, Hiroshi Nakano, Yasutake Hirachi

IEICE Trans. Electron., 2007

2006

A Coaxial Line to Post-Wall Waveguide Transition for a Cost-Effective Transformer between a RF-Device and a Planar Slot-Array Antenna in 60-GHz Band.

Takafumi Kai, Yusuke Katou, Jiro Hirokawa, Makoto Ando, Hiroshi Nakano, Yasutake Hirachi

IEICE Trans. Commun., 2006