Yeoul Na

According to our database1, Yeoul Na authored at least 17 papers between 2010 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
PKRU-safe: automatically locking down the heap between safe and unsafe languages.
Proceedings of the EuroSys '22: Seventeenth European Conference on Computer Systems, Rennes, France, April 5, 2022

2020
NoJITsu: Locking Down JavaScript Engines.
Proceedings of the 27th Annual Network and Distributed System Security Symposium, 2020

BinRec: dynamic binary lifting and recompilation.
Proceedings of the EuroSys '20: Fifteenth EuroSys Conference 2020, 2020

Distributed Heterogeneous N-Variant Execution.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2020

CoDaRR: Continuous Data Space Randomization against Data-Only Attacks.
Proceedings of the ASIA CCS '20: The 15th ACM Asia Conference on Computer and Communications Security, 2020

2019
DMON: A Distributed Heterogeneous N-Variant System.
CoRR, 2019

SoK: Sanitizing for Security.
Proceedings of the 2019 IEEE Symposium on Security and Privacy, 2019

PeriScope: An Effective Probing and Fuzzing Framework for the Hardware-OS Boundary.
Proceedings of the 26th Annual Network and Distributed System Security Symposium, 2019

2018
Energy-Efficient DRAM Selective Refresh Technique with Page Residence in a Memory Hierarchy of Hardware-Managed TLB.
IEICE Trans. Electron., 2018

Hardware Assisted Randomization of Data.
Proceedings of the Research in Attacks, Intrusions, and Defenses, 2018

Accelerating Dynamically-Typed Languages on Heterogeneous Platforms Using Guards Optimization.
Proceedings of the 32nd European Conference on Object-Oriented Programming, 2018

Bytecode Corruption Attacks Are Real - And How to Defend Against Them.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2018

2017
Venerable Variadic Vulnerabilities Vanquished.
Proceedings of the 26th USENIX Security Symposium, 2017

2016
JavaScript Parallelizing Compiler for Exploiting Parallelism from Data-Parallel HTML5 Applications.
ACM Trans. Archit. Code Optim., 2016

2011
A processor-based decoupled timing controller for flexible and low-cost 2D/3D plasma display panel design.
IEEE Trans. Consumer Electron., 2011

Applying frame layout to hardware design in FPGA for seamless support of cross calls in CPU-FPGA coupling architecture.
Microprocess. Microsystems, 2011

2010
Hierarchical data structure-based timing controller design for plasma display panels.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


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