Yijing Liao

According to our database, Yijing Liao authored at least 4 papers between 2022 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A 39-GHz CMOS Bidirectional Doherty Phased- Array Beamformer Using Shared-LUT DPD With Inter-Element Mismatch Compensation Technique for 5G Base Station.

Zheng Li, Jian Pang, Yi Zhang, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Yun Wang, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Jeehoon Park, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, 2023

2022

A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24-71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR.

Yi Zhang, Jian Pang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, 2022

A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station.

Zheng Li, Jian Pang, Yi Zhang, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Zhengyan Guo, Yun Wang, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR.

Jian Pang, Yi Zhang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE International Solid-State Circuits Conference, 2022