Yong-Chang Choi

Orcid: 0000-0003-4302-5753

According to our database1, Yong-Chang Choi authored at least 5 papers between 2010 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A Fully Digital Phase Modulator With a Highly Linear Phase Calibration Loop for Wideband Polar Transmitters.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

2017
A fully-digital phase modulator with phase calibration loop for high data-rate systems.
Proceedings of the International SoC Design Conference, 2017

2016
An efficient, wide range time-to-digital converter using cascaded time-interpolation stages for electrical impedance spectroscopy.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
A 0.7-MHz-10-MHz CT+DT Hybrid Baseband Chain With Improved Passband Flatness for LTE Application.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2010
A CMOS Transceiver for a Multistandard 13.56-MHz RFID Reader SoC.
IEEE Trans. Ind. Electron., 2010


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