Yonit Kesten

According to our database1, Yonit Kesten
  • authored at least 26 papers between 1992 and 2006.
  • has a "Dijkstra number"2 of four.

Timeline

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Bibliography

2006
Model Checking with Strong Fairness.
Formal Methods in System Design, 2006

2005
A compositional approach to CTL* verification.
Theor. Comput. Sci., 2005

Bridging the gap between fair simulation and trace inclusion.
Inf. Comput., 2005

2003
Bridging the Gap between Fair Simulation and Trace Inclusion.
Proceedings of the Computer Aided Verification, 15th International Conference, 2003

2002
Complete Proof System for QPTL.
J. Log. Comput., 2002

Automatic Verification of Probabilistic Free Choice.
Proceedings of the Verification, 2002

A Deductive Proof System for CTL.
Proceedings of the CONCUR 2002, 2002

Network Invariants in Action.
Proceedings of the CONCUR 2002, 2002

2001
Symbolic model checking with rich assertional languages.
Theor. Comput. Sci., 2001

Verification by Augmented Abstraction: The Automata-Theoretic View.
J. Comput. Syst. Sci., 2001

2000
Control and Data Abstraction: The Cornerstones of Practical Formal Verification.
STTT, 2000

Verification by Augmented Finitary Abstraction.
Inf. Comput., 2000

Verification of Clocked and Hybrid Systems.
Acta Inf., 2000

1999
Decidable Integration Graphs.
Inf. Comput., 1999

A Perfect Verification: Combining Model Checking with Deductive Analysis to Verify Real-Life Software.
Proceedings of the FM'99 - Formal Methods, 1999

Verifying Liveness by Augmented Abstraction.
Proceedings of the Computer Science Logic, 13th International Workshop, 1999

1998
Modularization and Abstraction: The Keys to Practical Formal Verification.
Proceedings of the Mathematical Foundations of Computer Science 1998, 1998

Algorithmic Verification of Linear Temporal Logic Specifications.
Proceedings of the Automata, Languages and Programming, 25th International Colloquium, 1998

1997
Symbolic Model Checking with Rich ssertional Languages.
Proceedings of the Computer Aided Verification, 9th International Conference, 1997

1996
Verification of Clocked and Hybrid Systems.
Proceedings of the Lectures on Embedded Systems, European Educational Forum, 1996

1995
A Complete Proof Systems for QPTL
Proceedings of the Proceedings, 1995

Verifying Clocked Transition Systems.
Proceedings of the Hybrid Systems III: Verification and Control, 1995

1993
Temporal Verification of Simulation and Refinement.
Proceedings of the A Decade of Concurrency, Reflections and Perspectives, 1993

A Decision Algorithm for Full Propositional Temporal Logic.
Proceedings of the Computer Aided Verification, 5th International Conference, 1993

1992
Integration Graphs: A Class of Decidable Hybrid Systems.
Proceedings of the Hybrid Systems, 1992

Timed and Hybrid Statecharts and Their Textual Representation.
Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, 1992


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