Yu Omori

According to our database, Yu Omori authored at least 4 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Parallel Verification in RISC-V Secure Boot.

Akihiro Saiki, Yu Omori, Keiji Kimura

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

2022

Open-Source Hardware Memory Protection Engine Integrated With NVMM Simulator.

Yu Omori, Keiji Kimura

IEEE Comput. Archit. Lett., 2022

2021

Non-Volatile Main Memory Emulator for Embedded Systems Employing Three NVMM Behaviour Models.

Yu Omori, Keiji Kimura

IEICE Trans. Inf. Syst., 2021

2019

Performance Evaluation on NVMM Emulator Employing Fine-Grain Delay Injection.

Yu Omori, Keiji Kimura

Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019