Yuan Cheng Qian

According to our database¹, Yuan Cheng Qian authored at least 2 papers between 2019 and 2022.

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2022

A Low-Jitter Sub-Sampling PLL With a Sub-Sampling DLL.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

2019

A Sub-Sampling PLL with Robust Operation under Supply Interference and Short Re-Locking Time.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019