Yue Zha

According to our database, Yue Zha authored at least 19 papers between 2016 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Revisiting PathFinder Routing Algorithm.

Yue Zha, Jing Li

Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

2021

Hetero-ViTAL: A Virtualization Stack for Heterogeneous FPGA Clusters.

Yue Zha, Jing Li

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

When application-specific ISA meets FPGAs: a multi-layer virtualization framework for heterogeneous cloud FPGAs.

Yue Zha, Jing Li

Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020

MEG: A RISCV-based System Emulation Infrastructure for Near-data Processing Using FPGAs and High-bandwidth Memory.

Jialiang Zhang, Yue Zha, Nicholas Beckwith, Bangya Liu, Jing Li

ACM Trans. Reconfigurable Technol. Syst., 2020

Liquid Silicon: A Nonvolatile Fully Programmable Processing-in-Memory Processor With Monolithically Integrated ReRAM.

Yue Zha, Etienne Nowak, Jing Li

IEEE J. Solid State Circuits, 2020

Hyper-Ap: Enhancing Associative Processing Through A Full-Stack Optimization.

Yue Zha, Jing Li

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Virtualizing FPGAs in the Cloud.

Yue Zha, Jing Li

Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019

Liquid Silicon: A Nonvolatile Fully Programmable Processing-In-Memory Processor with Monolithically Integrated ReRAM for Big Data/Machine Learning Applications.

Yue Zha, Etienne Nowak, Jing Li

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

MEG: A RISCV-Based System Simulation Infrastructure for Exploring Memory Optimization Using FPGAs and Hybrid Memory Cube.

Jialiang Zhang, Yang Liu, Gaurav Jain, Yue Zha, Jonathan Ta, Jing Li

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018

Specialization: A New Path Towards Low Power.

Yue Zha, Jing Li

J. Low Power Electron., 2018

CMA: A Reconfigurable Complex Matching Accelerator for Wire-Speed Network Intrusion Detection.

Yue Zha, Jing Li

IEEE Comput. Archit. Lett., 2018

An Alternative Analytical Approach to Associative Processing.

Soroosh Khoram, Yue Zha, Jing Li

IEEE Comput. Archit. Lett., 2018

Liquid Silicon: A Data-Centric Reconfigurable Architecture Enabled by RRAM Technology.

Yue Zha, Jing Li

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Liquid Silicon-Monona: A Reconfigurable Memory-Oriented Computing Fabric with Scalable Multi-Context Support.

Yue Zha, Jing Li

Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

2017

IMEC: A Fully Morphable In-Memory Computing Fabric Enabled by Resistive Crossbar.

Yue Zha, Jing Li

IEEE Comput. Archit. Lett., 2017

Challenges and Opportunities: From Near-memory Computing to In-memory Computing.

Soroosh Khoram, Yue Zha, Jialiang Zhang, Jing Li

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

RRAM-based reconfigurable in-memory computing architecture with hybrid routing.

Yue Zha, Jing Li

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

A Mixed-Signal Data-Centric Reconfigurable Architecture enabled by RRAM Technology (Abstract Only).

Yue Zha, Jialiang Zhang, Zhiqiang Wei, Jing Li

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016

Reconfigurable in-memory computing with resistive memory crossbar.

Yue Zha, Jing Li

Proceedings of the 35th International Conference on Computer-Aided Design, 2016