Yujin Chung

Orcid: 0000-0003-2477-2446

According to our database1, Yujin Chung authored at least 6 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2023
F4T: A Fast and Flexible FPGA-based Full-stack TCP Acceleration Framework.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022
NeuroSync: A Scalable and Accurate Brain Simulator Using Safe and Efficient Speculation.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

CryoWire: wire-driven microarchitecture designs for cryogenic computing.
Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021
NeuroEngine: a hardware-based event-driven simulation system for advanced brain-inspired computing.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2007
Log-linear model-based multifactor dimensionality reduction method to detect gene-gene interactions.
Bioinform., 2007

Odds ratio based multifactor-dimensionality reduction method for detecting gene-gene interactions.
Bioinform., 2007


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