Yutaka Matsuoka

According to our database1, Yutaka Matsuoka authored at least 2 papers between 2010 and 2013.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2: 1 Multiplexer and 1: 2 Demultiplexer Modules Using 1-µm InP/InGaAs/InP Double Heterojunction Bipolar Transistors.
IEICE Trans. Electron., 2013

2010
A 120-Gbit/s 1.27-W 520-mVpp 2: 1 Multiplexer IC Using Self-Aligned InP/InGaAs/InP DHBTs with Emitter Mesa Passivation.
IEICE Trans. Electron., 2010


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