Zejia Lyu

Orcid: 0009-0009-1019-5124

According to our database1, Zejia Lyu authored at least 4 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Bibliography

2025
Algorithm and evaluation of generating pseudo-datasets for integrated circuit power analysis.
Frontiers Inf. Technol. Electron. Eng., September, 2025

Correction Method for Power Analysis of Digital Integrated Circuits Based on Standard Cells.
J. Circuits Syst. Comput., 2025

2024
Symbolic-functional representation inference for gate-level power estimation.
Microelectron. J., 2024

An efficient algorithm for estimating gate-level power consumption in large-scale integrated circuits.
Microelectron. J., 2024


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