Jizhong Shen

Orcid: 0000-0002-9031-2379

According to our database1, Jizhong Shen authored at least 27 papers between 1990 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Design of current steering logic CMOS circuit.
Microelectron. J., November, 2023

2022
FreSCo: Frequency-Domain Scan Context for LiDAR-based Place Recognition with Translation and Rotation Invariance.
CoRR, 2022

Localization of seizure onset zone with epilepsy propagation networks based on graph convolutional network.
Biomed. Signal Process. Control., 2022

FreSCo: Frequency-Domain Scan Context for LiDAR-based Place Recognition with Translation and Rotation Invariance.
Proceedings of the 17th International Conference on Control, 2022

2021
Low-rate DoS attack detection method based on hybrid deep neural networks.
J. Inf. Secur. Appl., 2021

2020
A Method of Few-Shot Network Intrusion Detection Based on Meta-Learning Framework.
IEEE Trans. Inf. Forensics Secur., 2020

Web page classification based on heterogeneous features and a combination of multiple classifiers.
Frontiers Inf. Technol. Electron. Eng., 2020

2019
Detection method of domain names generated by DGAs based on semantic representation and deep neural network.
Comput. Secur., 2019

P300-based deception detection of mock network fraud with modified genetic algorithm and combined classification.
Proceedings of the 7th International Winter Conference on Brain-Computer Interface, 2019

2018
An Intrusion Detection System Using a Deep Neural Network With Gated Recurrent Units.
IEEE Access, 2018

2017
Function synthesis algorithm based on RTD-based three-variable universal logic gates.
Frontiers Inf. Technol. Electron. Eng., 2017

An algorithm for identifying symmetric variables based on the order eigenvalue matrix.
Frontiers Inf. Technol. Electron. Eng., 2017

Transistor level SCA-resistant scheme based on fluctuating power logic.
Sci. China Inf. Sci., 2017

Improved low-entropy masking scheme for LED with mitigation against correlation-enhanced collision attacks.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016
Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme.
Frontiers Inf. Technol. Electron. Eng., 2016

An Algorithm for Identifying Symmetric Variables in the Canonical Reed-Muller Algebra System.
J. Circuits Syst. Comput., 2016

Design of flip-flops with clock-gating and pull-up control scheme for power-constrained and speed-insensitive applications.
IET Comput. Digit. Tech., 2016

2015
Design of a novel RTD-based three-variable universal logic gate.
Frontiers Inf. Technol. Electron. Eng., 2015

Function Synthesis Algorithm of RTD-Based Universal Threshold Logic Gate.
J. Appl. Math., 2015

2012
Design of nanopipelined adder based on resonant tunneling diode.
Microelectron. J., 2012

2011
Novel universal threshold logic gate based on RTD and its application.
Microelectron. J., 2011

Design of a novel low power 8-transistor 1-bit full adder cell.
J. Zhejiang Univ. Sci. C, 2011

1996
Fuzzy Language on Free Monoid.
Inf. Sci., 1996

1995
Race-Hazard and Skip-Hazard in Multivalued Combinational Circuits.
Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995

1993
Fuzzifying groups based on complete residuated lattice-valued logic.
Inf. Sci., 1993

1992
Fuzzifying Topological Groups Based on Completely Distributive Residuated Lattice-Valued Logic (I).
Proceedings of the 22nd IEEE International Symposium on Multiple-Valued Logic, 1992

1990
On fuzzy regular subsemigroups of a semigroup.
Inf. Sci., 1990


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