A. Venkatesan
Orcid: 0000-0002-6683-7167
  According to our database1,
  A. Venkatesan
  authored at least 8 papers
  between 2004 and 2024.
  
  
Collaborative distances:
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Bibliography
  2024
  2023
Erratum: Diode Connected Transistor-Based Low PDP Adiabatic Full Adder in 7nm FINFET Technology for MIMO Applications.
    
  
    J. Circuits Syst. Comput., September, 2023
    
  
Diode Connected Transistor-Based Low PDP Adiabatic Full Adder in 7 nm FINFET Technology for MIMO Applications.
    
  
    J. Circuits Syst. Comput., May, 2023
    
  
  2021
Realization of all logic gates and memory latch in the SC-CNN cell of the simple nonlinear MLC circuit.
    
  
    CoRR, 2021
    
  
  2018
Chimera at the phase-flip transition of an ensemble of identical nonlinear oscillators.
    
  
    Commun. Nonlinear Sci. Numer. Simul., 2018
    
  
  2016
Vibrational resonance and implementation of dynamic logic gate in a piecewise-linear Murali-Lakshmanan-Chua circuit.
    
  
    Commun. Nonlinear Sci. Numer. Simul., 2016
    
  
  2009
Classification of bifurcations and Chaos in Chua's Circuit with Effect of Different Periodic Forces.
    
  
    Int. J. Bifurc. Chaos, 2009
    
  
  2004