Aart J. de Geus

According to our database, Aart J. de Geus authored at least 18 papers between 1984 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

The Greatest "Tech-Onomic Push-Pull" in Human History.

Aart J. de Geus

IEEE Des. Test, 2014

2007

A. Richard Newton: Technologist with a Mission.

Aart J. de Geus

IEEE Des. Test Comput., 2007

Megatrends and EDA 2017.

Francine Bacchini, Gregory S. Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada

Proceedings of the 44th Design Automation Conference, 2007

2005

Differentiate and deliver: leveraging your partners.

Jay Vleeschhouwer, Warren East, Michael J. Fister, Aart J. de Geus, Walden C. Rhines, Jackson Hu, Rick Cassidy

Proceedings of the 42nd Design Automation Conference, 2005

2004

EDA: this is serious business.

Robert Dahlberg, Kurt Keutzer, R. Bingham, Aart J. de Geus, Walden C. Rhines

Proceedings of the 41th Design Automation Conference, 2004

2002

Electronic Industry on Fire: How to Survive and Thrive.

Aart J. de Geus

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

2000

Slap it Together and Ship it!

Aart J. de Geus

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1994

Test: The New Value-Added Field.

Aart J. de Geus

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

Executive Perspective and Vision of the Future of EDA (Panel).

Joseph B. Costello, Walden C. Rhines, Aart J. de Geus, Alain Hanover, Doug Fairbairn, Rick Carlson, Ronald Collett

Proceedings of the 31st Conference on Design Automation, 1994

1992

VHDL: Toward a Unified View of Design.

Allen Dewey, Aart J. de Geus

IEEE Des. Test Comput., 1992

High Level Design: A Design Vision for the 90's.

Aart J. de Geus

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1987

Testability-Driven Random Test-Pattern Generation.

Robert Lisanke, Franc Brglez, Aart J. de Geus, David Gregory

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

1986

Synthesis and Optimization of Multilevel Logic under Timing Constraints.

Karen A. Bartlett, William W. Cohen, Aart J. de Geus, Gary D. Hachtel

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986

Computer-Aided-Design Research at the GE Microelectronics Center.

David Hightower, Aart J. de Geus, Patrick Fasang, Robert Griffin, Gary Leive

IEEE Des. Test, 1986

SOCRATES: a system for automatically synthesizing and optimizing combinational logic.

David Gregory, Karen A. Bartlett, Aart J. de Geus, Gary D. Hachtel

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

Logic synthesis and optimization benchmarks for the 1986 Design Automation Conference.

Aart J. de Geus

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985

A Rule-Based System for Optimizing Combinational Logic.

Aart J. de Geus, William W. Cohen

IEEE Des. Test, 1985

1984

IDA: Interconnect delay analysis for integrated circuits.

Aart J. de Geus, J. B. Reed, M. Rekhson, G. Wikle

Proceedings of the 21st Design Automation Conference, 1984