Abdelhafid Bouhraoua

According to our database1, Abdelhafid Bouhraoua authored at least 14 papers between 2006 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Bibliography

2016
A low-cost platform for the prototyping and characterization of digital circuit IPs.
Integr., 2016

2015
Towards a Test Definition Language for Integrated Circuits.
J. Circuits Syst. Comput., 2015

2014
Buffer Engineering for modified Fat Tree NoCs for Many-Core Systems-on-Chip.
J. Circuits Syst. Comput., 2014

Smart Bolts Monitoring Using Wireless Sensor Network: Implementation and Performance Evaluation.
Int. J. Distributed Sens. Networks, 2014

Delay characterization and performance evaluation of cluster-based WSN with different deployment distributions.
Future Gener. Comput. Syst., 2014

2012
Radio Frequency Energy Harvesting Characterization: An Experimental Study.
Proceedings of the 11th IEEE International Conference on Trust, 2012

The Impact of Sensor Node Distribution on Routing Protocols Performance: A Comparitive Study.
Proceedings of the 11th IEEE International Conference on Trust, 2012

2011
A hardwired NoC infrastructure for embedded systems on FPGAs.
Microprocess. Microsystems, 2011

Improved Modified Fat-Tree Topology Network-on-Chip.
J. Circuits Syst. Comput., 2011

2010
Design feasibility study for a 500 Gbits/s advanced encryption standard cipher/decipher engine.
IET Comput. Digit. Tech., 2010

A New Client Interface Architecture for the Modified Fat Tree (MFT) Network-on-Chip (NoC) Topology.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

2009
Scalable FPGA implementation for mixed-norm LMS-LMF adaptive filters.
Proceedings of the International Conference on Wireless Communications and Mobile Computing: Connecting the World Wirelessly, 2009

2008
Addressing Heterogeneous Bandwidth Requirements in Modified Fat-Tree Networks-on-Chips.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2006
A High-Throughput Network-on-Chip Architecture for Systems-on-Chip Interconnect.
Proceedings of the International Symposium on System-on-Chip, 2006


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