Abhishek Das

According to our database, Abhishek Das authored at least 12 papers between 2017 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Double Column Error Correction in RRAM Matrix Multiplication Using Weighted Checksums.

Krishnaja Kodali, Kenrick Xavier Pinto, Abhishek Das, Nur A. Touba

Proceedings of the 26th IEEE Latin American Test Symposium, 2025

2024

Double Adjacent Error Correction in RRAM Matrix Multiplication using Weighted Checksums.

Kenrick Xavier Pinto, Krishnaja Kodali, Abhishek Das, Nur A. Touba

Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024

2023

Highly Efficient Layered Syndrome-based Double Error Correction Utilizing Current Summing in RRAM Cells to Simplify Decoder.

Shruti Dutta, Sai Charan Rachamadugu Chinni, Abhishek Das, Nur A. Touba

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2020

A New Class of Single Burst Error Correcting Codes with Parallel Decoding.

Abhishek Das, Nur A. Touba

IEEE Trans. Computers, 2020

Selective Checksum based On-line Error Correction for RRAM based Matrix Operations.

Abhishek Das, Nur A. Touba

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

2019

Layered-ECC: A Class of Double Error Correcting Codes for High Density Memory Systems.

Abhishek Das, Nur A. Touba

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

A Graph Theory Approach towards IJTAG Security via Controlled Scan Chain Isolation.

Abhishek Das, Nur A. Touba

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Online Correction of Hard Errors and Soft Errors via One-Step Decodable OLS Codes for Emerging Last Level Caches.

Abhishek Das, Nur A. Touba

Proceedings of the IEEE Latin American Test Symposium, 2019

2018

Systematic b-adjacent symbol error correcting reed-solomon codes with parallel decoding.

Abhishek Das, Nur A. Touba

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Low Complexity Burst Error Correcting Codes to Correct MBUs in SRAMs.

Abhishek Das, Nur A. Touba

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Efficient Non-Binary Hamming Codes for Limited Magnitude Errors in MLC PCMs.

Abhishek Das, Nur A. Touba

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

2017

Limited Magnitude Error Correction Using OLS Codes for Memories with Multilevel Cells.

Abhishek Das, Nur A. Touba

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017