Abumoslem Jannesari

According to our database1, Abumoslem Jannesari authored at least 28 papers between 2007 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2021
Wideband Inductorless True Time Delay Cell Based on CMOS Inverter for Timed Array Receivers.
Circuits Syst. Signal Process., 2021

A Higher-Order Highly Linear N-Path Band-Pass Filter.
Circuits Syst. Signal Process., 2021

2020
Cell Weighting and Gate Inductive Peaking Techniques for Wideband Noise Suppression in Distributed Amplifiers.
IEEE Trans. Circuits Syst., 2020

Fast-Transient-Response Low-Voltage Integrated, Interleaved DC-DC Converter for Implantable Devices.
J. Circuits Syst. Comput., 2020

2019
Design of a Highly Linear Gain Stage with Complementary Derivative Superposition Technique.
Wirel. Pers. Commun., 2019

Noise shaping in low noise amplifiers using active feedback and pole-zero adjustment.
Microelectron. J., 2019

A parasitic insensitive passive switched-capacitor interpolation finite impulse response filter.
Int. J. Circuit Theory Appl., 2019

High dynamic range pseudo-two-level digital pulse-width modulation for power-efficient RF transmitters.
Int. J. Circuit Theory Appl., 2019

2018
Power-efficient burst-mode RF transmitter based on reference-adaptive multilevel pulse-width modulation.
Int. J. Circuit Theory Appl., 2018

2017
A new approach to frequency-domain noise analysis and design of a very-low noise amplifier in radio and microwave frequencies.
Microelectron. J., 2017

A sub-2-dB noise figure linear wideband low noise amplifier in 0.18 µm CMOS.
Microelectron. J., 2017

Pre-distortion technique to improve linearity of low noise amplifier.
Microelectron. J., 2017

A Low-Power Three-Tap DFE with Switched Resistor Slicer and CTLE in 0.18μm CMOS Technology.
J. Circuits Syst. Comput., 2017

Analysis and design of discrete-time charge domain filters with complex conjugate poles.
Int. J. Circuit Theory Appl., 2017

Harmonic fold back reduction at the <i>N</i>-path filters.
Int. J. Circuit Theory Appl., 2017

2016
Two-path inverter-based low noise amplifier for 10-12 GHz applications.
Microelectron. J., 2016

A low power low noise amplifier employing negative feedback and current reuse techniques.
Microelectron. J., 2016

Design of a High-Frequency Very Low-Power Direct Digital Frequency Synthesizer.
J. Circuits Syst. Comput., 2016

2015
A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems.
Int. J. Circuit Theory Appl., 2015

2014
Data Compression in Brain-Machine/Computer Interfaces Based on the Walsh-Hadamard Transform.
IEEE Trans. Biomed. Circuits Syst., 2014

2012
A merged LNA and mixer with improved noise figure and gain for software defined radio applications.
IEICE Electron. Express, 2012

2011
A high gain, wide-band, fast settling amplifier with no-miller capacitor compensation.
IEICE Electron. Express, 2011

Multi-Level 2D LUT as digital pre-distorter for linearizing memory affected RF power amplifiers.
IEICE Electron. Express, 2011

2010
A low-power sub-threshold CMOS continuous-time active-filter with reduced in-band noise for WiMAX applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2008
Sinusoidal shaping of the ISF in LC oscillators.
Int. J. Circuit Theory Appl., 2008

2007
Comments on "A General Theory of Phase Noise in Electrical Oscillators".
IEEE J. Solid State Circuits, 2007

Source-injection serial coupled CMOS LC quadrature VCO.
IEICE Electron. Express, 2007

Sinusoidal-switched serial-coupled CMOS LC quadrature VCO.
IEICE Electron. Express, 2007


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