Saeed Saeedi

Orcid: 0000-0003-3051-2376

According to our database1, Saeed Saeedi authored at least 17 papers between 2003 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
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PhD thesis 
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Links

Online presence:

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Bibliography

2022
Transconductance Boosting Technique for Bandwidth Extension in Low-Voltage and Low-Noise Optical TIAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2020
Cell Weighting and Gate Inductive Peaking Techniques for Wideband Noise Suppression in Distributed Amplifiers.
IEEE Trans. Circuits Syst., 2020

2019
Analysis of Timing Accuracy and Sensitivity in a RF Correlation-Based Impulse Radio Receiver With Phase Interpolation for Data Synchronization.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Stability analysis and compensation technique for low-voltage regulated cascode transimpedance amplifier.
Microelectron. J., 2018

Design and analysis of a millimeter-wave injection locked frequency divider with transconductance boosting technique.
Int. J. Circuit Theory Appl., 2018

2017
A single-bit continuous-time delta-sigma modulator using clock-jitter and inter-symbol-interference suppression technique.
Int. J. Circuit Theory Appl., 2017

Selectivity and sensitivity enhancement methods for high-data-rate super-regenerative receiver.
Int. J. Circuit Theory Appl., 2017

2012
Noise Canceling Balun-LNA with Enhanced IIP2 and IIP3 for Digital TV Applications.
IEICE Trans. Electron., 2012

2011
Low phase noise on-chip oscillator for implantable biomedical applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Modeling of DLL-based frequency multiplier in time and frequency domain with Matlab Simulink.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
Second and third-order distortion suppression technique for noise canceling CMOS LNAs.
IEICE Electron. Express, 2009

2008
A divide-by-3 frequency divider for I/Q generation in a multi-band frequency synthesizer.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2006
A technique to suppress tail current flicker noise in CMOS LC VCOs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A compact low power mixed-signal equalizer for gigabit Ethernet applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2004
A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearity.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A new full CMOS 2.5 V two-stage line driver with variable gain for ADSL applications.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
A 1.5-V 14-bit CMOS DAC with a new self-calibration technique for wireless communication systems.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003


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