Adam G. Kimura

Orcid: 0000-0002-5141-2182

According to our database1, Adam G. Kimura authored at least 4 papers between 2013 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Netlist Decompilation Workflow for Recovered Design Verification, Validation, and Assurance.
IACR Cryptol. ePrint Arch., 2021

2020
A Decomposition Workflow for Integrated Circuit Verification and Validation.
J. Hardw. Syst. Secur., 2020

2016
Quantifying metrics for analyzing integrated circuit design integrity.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2013
Trusted verification test bench development for Phase-Locked Loop (PLL) hardware insertion.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013


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