Adrian Tatulian

According to our database, Adrian Tatulian authored at least 7 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Scalable Reasoning and Sensing Using Processing-In-Memory With Hybrid Spin/CMOS-Based Analog/Digital Blocks.

Mousam Hossain, Adrian Tatulian, Shadi Sheikhfaal, Harshavardhan Reddy Thummala, Ronald F. DeMara

IEEE Trans. Emerg. Top. Comput., 2023

Energy-/Area-Efficient Spintronic ANN-based Digit Recognition via Progressive Modular Redundancy.

Mousam Hossain, Adrian Tatulian, Harshavardhan Reddy Thummala, Ronald F. DeMara, Soheil Salehi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Nonuniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation.

Adrian Tatulian, Ronald F. DeMara

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Generalized Exponentiation Using STT Magnetic Tunnel Junctions: Circuit Design, Performance, and Application to Neural Network Gradient Decay.

Adrian Tatulian, Ronald F. DeMara

SN Comput. Sci., 2022

2021

A Reconfigurable and Compact Spin-Based Analog Block for Generalizable n^th Power and Root Computation.

Adrian Tatulian, Ronald F. DeMara

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2019

Mixed-Signal Spin/Charge Reconfigurable Array for Energy-Aware Compressive Signal Processing.

Adrian Tatulian, Soheil Salehi, Ronald F. DeMara

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

MRAM-Based Stochastic Oscillators for Adaptive Non-Uniform Sampling of Sparse Signals in IoT Applications.

Soheil Salehi, Alireza Zaeemzadeh, Adrian Tatulian, Nazanin Rahnavard, Ronald F. DeMara

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019