Ahmad Lashgar

Orcid: 0000-0003-4838-8895

Affiliations:
  • University of Victoria, Electrical and Computer Engineering Department
  • University of Tehran, School of Electrical and Computer Engineering


According to our database1, Ahmad Lashgar authored at least 17 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2019
Efficient implementation of OpenACC cache directive on NVIDIA GPUs.
Int. J. High Perform. Comput. Netw., 2019

2018
TELEPORT: Hardware/software alternative to CUDA shared memory programming.
Microprocess. Microsystems, 2018

Loop Perforation in OpenACC.
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018

2016
Employing Software-Managed Caches in OpenACC: Opportunities and Benefits.
ACM Trans. Model. Perform. Evaluation Comput. Syst., 2016

OpenACC Cache Directive: Opportunities and Optimizations.
Proceedings of the Third Workshop on Accelerator Programming Using Directives, 2016

Employing Compression Solutions under OpenACC.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
A Case Study in Reverse Engineering GPGPUs: Outstanding Memory Handling Resources.
SIGARCH Comput. Archit. News, 2015

Rethinking Prefetching in GPGPUs: Exploiting Unique Opportunities.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

2014
HARP: Harnessing inactive threads in many-core processors.
ACM Trans. Embed. Comput. Syst., 2014

IPMACC: Open Source OpenACC to CUDA/OpenCL Translator.
CoRR, 2014

A case against small data types in GPGPUs.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013
Towards green GPUs: Warp size impact analysis.
Proceedings of the International Green Computing Conference, 2013

Warp size impact in GPUs: large or small?
Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, 2013

Inter-warp Instruction Temporal Locality in Deep-Multithreaded GPUs.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012
Dynamic Warp Resizing in High-Performance SIMT
CoRR, 2012

Investigating Warp Size Impact in GPUs
CoRR, 2012

Dynamic warp resizing: Analysis and benefits in high-performance SIMT.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012


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