Ahmed F. Shalash

IET Circuits Devices Syst., 2015

Low complexity timing synchronization and channel estimation for DVB-T2 over long echo channels.

[BibT_eX]

[DOI]

Mohamed H. Omar

Ayman Elezabi

Proceedings of the 36th IEEE Sarnoff Symposium 2015, Newark, NJ, USA, 2015

Timing recovery in DVB-T2 using multi-rate farrow structure.

[BibT_eX]

[DOI]

Sherif M. Saad

Hisham M. Hamed

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014

Two Extended Programmable BCH Soft Decoders Using Least Reliable Bits Reprocessing.

[BibT_eX]

[DOI]

Circuits Syst. Signal Process., 2014

2013

Adaptive Bit Loading and Puncturing Using Long Single Codewords in OFDM Systems.

[BibT_eX]

[DOI]

Wirel. Pers. Commun., 2013

Improved synchronization, channel estimation, and simplified LDPC decoding for the physical layer of the DVB-T2 receiver.

[BibT_eX]

[DOI]

Doaa H. Sayed

Maha Elsabrouty

EURASIP J. Wirel. Commun. Netw., 2013

Low complexity maximum likelihood estimation of time and frequency offset for DVB-T2.

[BibT_eX]

[DOI]

Sherif M. Saad

Hisham M. Hamed

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2012

Embedded reconfigurable synchronization & acquisition ASIP for a multi-standard OFDM receiver.

[BibT_eX]

[DOI]

Mahmoud A. Said

Omar A. Nasr

EURASIP J. Embed. Syst., 2012

Implementation of a reconfigurable ASIP for high throughput low power DFT/DCT/FIR engine.

[BibT_eX]

[DOI]

Karim Mohamed

EURASIP J. Embed. Syst., 2012

2011

All digital time tracking loop for DVB-H and DVB-T.

[BibT_eX]

[DOI]

Mohamed Mohi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine.

[BibT_eX]

[DOI]

Karim Mohamed

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A reconfigurable baseband processor for wireless OFDM synchronization sub-system.

[BibT_eX]

[DOI]

Mahmoud Abdelall

Hossam A. H. Fahmy

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Memory conflict analysis for a multi-standard, reconfigurable turbo decoder.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Design architecture of generic DFT/DCT 1D and 2D engine controlled by SW instructions.

[BibT_eX]

[DOI]

Hisham M. Hamed

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

An Automatic Gain Control Topology for CMOS Digital Radio Receiver.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Adaptive Puncturing for Coded OFDMA Systems.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2009

2004

Throughput maximizing FIR filterbank for MIMO LTI wireline channels.

[BibT_eX]

[DOI]

Mohammed Nafie

Proceedings of IEEE International Conference on Communications, 2004

2000

Power Efficient Folding of Pipelined LMS Adaptive Filters with Applications to Wireline Digital Communications.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2000

Theoretical and practical limits of next-generation high-speed digital subscriber loops.

[BibT_eX]

[DOI]

Hiroshi Takatori

IEEE Trans. Commun., 2000

1999

Multidimensional carrierless AM/PM systems for digital subscriber loops.

[BibT_eX]

[DOI]

IEEE Trans. Commun., 1999

Multiple access over wireline channels using orthogonal signaling.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Orthogonality division multiple access LTI transmit filters for ISI-channels.

[BibT_eX]

[DOI]