Ajay Janardanan

According to our database, Ajay Janardanan authored at least 1 paper in 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2025

21.5 A Fully Integrated Multi-Phase Voltage Regulator with Enhanced Light-Load-Efficiency Peak of 86%, Featuring an Autonomous Mode Transition from Hard-Switching to Soft-Switching to Discontinuous Conduction Mode in 3nm FinFET CMOS.

Kishan Joshi, Avinash Shreepathi Bhat, Christopher Schaef, Keng Chen, Edward Lee, Yura Kocharyan, Ajay Janardanan, Dinesh Ganta, Huanhuan Zhang, Maximilian Geppert, Prescott McLaughlin, Arvind Raghavan, Sivaraman Masilamani, Syed Askari, Kelly Livingston

Proceedings of the IEEE International Solid-State Circuits Conference, 2025