Allan L. Fisher

According to our database1, Allan L. Fisher authored at least 19 papers between 1983 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2003
Developing a Metadata Data Model for the National Health and Nutrition Examination Survey (NHANES).
Proceedings of the AMIA 2003, 2003

2001
Quality Assurance (QC)/Quality Control (QC) Processes for the National Health and Nutrition Examination Survey (NHANES).
Proceedings of the AMIA 2001, 2001

1995
Flattening and Parallelizing Irregular, Recurrent Loop Nests.
Proceedings of the Fifth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1995

1994
Parallelizing Complex Scans and Reductions.
Proceedings of the ACM SIGPLAN'94 Conference on Programming Language Design and Implementation (PLDI), 1994

Tradeoffs in Canonical Sequential Function Representations.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

1993
Representation and symbolic manipulation of linearly inductive Boolean functions.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Parametric Circuit Representation Using Inductive Boolean Functions.
Proceedings of the Computer Aided Verification, 5th International Conference, 1993

1992
Teaching empirical performance analysis of parallel programs.
Proceedings of the 23rd SIGCSE Technical Symposium on Computer Science Education, 1992

1991
Teaching the programming of parallel computers.
Proceedings of the 22nd SIGCSE Technical Symposium on Computer Science Education, 1991

Size and Access Inference for Data-Parallel Programs.
Proceedings of the ACM SIGPLAN'91 Conference on Programming Language Design and Implementation (PLDI), 1991

1990
Flexible Parallel Polygon Rendering.
Proceedings of the 1990 International Conference on Parallel Processing, 1990

1989
Computing the Hough Transform on a Scan Line Array Processor (Image Processing).
IEEE Trans. Pattern Anal. Mach. Intell., 1989

Verifying pipelined hardware using symbolic logic simulation.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988
Communication and code optimization in SIMD programs.
Proceedings of the International Conference on Parallel Processing, 1988

1986
Scan Line Array Processors for Image Computation.
Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986

1985
Synchronizing Large VLSI Processor Arrays.
IEEE Trans. Computers, 1985

Memory and Modularity in Systolic Array Implementations.
Proceedings of the International Conference on Parallel Processing, 1985

1984
Dictionary Machines With a Small Number of Processors.
Proceedings of the 11th Annual Symposium on Computer Architecture, 1984

1983
Architecture of the PSC: A Programmable Systolic Chip
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983


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