Soumitra Bose

According to our database, Soumitra Bose authored at least 24 papers between 1988 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Delay Test Quality Evaluation Using Bounded Gate Delays.

Soumitra Bose, Vishwani D. Agrawal

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Delay fault simulation with bounded gate delay mode.

Soumitra Bose, Hillary Grimes, Vishwani D. Agrawal

Proceedings of the 2007 IEEE International Test Conference, 2007

Estimating stuck fault coverage in sequential logic using state traversal and entropy analysis.

Soumitra Bose, Vishwani D. Agrawal

Proceedings of the 2007 IEEE International Test Conference, 2007

2006

Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring.

Vishwani D. Agrawal, Soumitra Bose, Vijay Gangaram

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Fault Coverage Estimation for Non-Random Functional Input Sequences.

Soumitra Bose, Vishwani D. Agrawal

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

Schematic array models for associative and non-associative memory circuits.

Soumitra Bose, Amit Nandi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

2004

Modeling Custom Digital Circuits for Test.

Soumitra Bose

J. Electron. Test., 2004

Extraction of Schematic Array Models for Memory Circuits.

Soumitra Bose, Amit Nandi

Proceedings of the 2004 Design, 2004

2002

Automated Modeling of Custom Digital Circuits for Test.

Soumitra Bose

Proceedings of the 2002 Design, 2002

1998

A rated-clock test method for path delay faults.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

IEEE Trans. Very Large Scale Integr. Syst., 1998

Concurrent fault simulation on message passing multicomputers.

Soumitra Bose, Prathima Agrawal

IEEE Trans. Very Large Scale Integr. Syst., 1998

Deriving Logic Systems for Path Delay Test Generation.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

IEEE Trans. Computers, 1998

1997

Algorithms for Switch Level Delay Fault Simulation.

Soumitra Bose, Vishwani D. Agrawal, Thomas G. Szymanski

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1995

Sequential logic path delay test generation by symbolic analysis.

Soumitra Bose, Vishwani D. Agrawal

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1993

Path delay fault simulation of sequential circuits.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

IEEE Trans. Very Large Scale Integr. Syst., 1993

The optimistic update theorem for path delay testing in sequential circuits.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

J. Electron. Test., 1993

A Path Delay Fault Simulator for Sequential Circuits.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

Proceedings of the Sixth International Conference on VLSI Design, 1993

Generation of Compact Delay Tests by Multiple-Path Activation.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

Delay fault testability evaluation through timing simulation.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

Proceedings of the Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1993

Logic systems for path delay test generation.

Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal

Proceedings of the European Design Automation Conference 1993, 1993

1992

PARTHENON: A Parallel Theorem Prover for Non-Horn Clauses.

Soumitra Bose, Edmund M. Clarke, David E. Long, Spiro Michaylov

J. Autom. Reason., 1992

Concurrent Fault Simulation of Logic Gates and Memory Blocks on Message Passing Multicomputers.

Soumitra Bose, Prathima Agrawal

Proceedings of the 29th Design Automation Conference, 1992

1989

Verifying pipelined hardware using symbolic logic simulation.

Soumitra Bose, Allan L. Fisher

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988

PARTHENON: A Parallel Theorem Prover for Non-Horn Clauses.

P. E. Allen, Soumitra Bose, Edmund M. Clarke, Spiro Michaylov

Proceedings of the 9th International Conference on Automated Deduction, 1988