Amir Amirabadi

Orcid: 0000-0003-1271-7175

According to our database1, Amir Amirabadi authored at least 19 papers between 2004 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2021
Osteolysis: A Literature Review of Basic Science and Potential Computer-Based Image Processing Detection Methods.
Comput. Intell. Neurosci., 2021

2019
A Dual Feedback Wideband Differential Low Noise Amplifier inl30 nm CMOS Process.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

A 130 nm CMOS Passive Mixer Utilizing Positive-Negative Feedback as the Input Transconductance.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2018
A 65 nm linear broad-band differential Low Noise Amplifier using post distortion technique.
Microelectron. J., 2018

2015
A 130 nm wideband fully differential linear low noise amplifier.
Microelectron. J., 2015

A 130 nm wideband fully differential linear low noise amplifier.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Highly linear wide-band differential LNA using active feedback as post distortion.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A 0.13μm dual-band common-gate LNA using active post distortion for mobile WiMAX.
Microelectron. J., 2014

Active balun-based wideband differential LNA for noise and distortion cancellation.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

2011
Wideband Inductor-Less Linear LNA Using Post Distortion Technique.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

High IIP3 and Low-Noise CMOS Mixer Using Non-linear Feedback Technique.
Circuits Syst. Signal Process., 2011

2007
Clock Delayed Domino Logic With Efficient Variable Threshold Voltage Keeper.
IEEE Trans. Very Large Scale Integr. Syst., 2007

2006
Clock Gated Static Pulsed Flip-Flop (CGSPFF) in Sub 100 nm Technology.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Low power low leakage clock gated static pulsed flip-flop.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Low power and high performance clock delayed domino logic using saturated keeper.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Double edge triggered Feedback Flip-Flop in sub 100NM technology.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Domino logic with an efficient variable threshold voltage keeper.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A CMOS elliptic low-pass switched capacitor ladder filter for video communication using bilinear implementation.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Leakage current reduction by new technique in standby mode.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004


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