Andrej Trost

According to our database1, Andrej Trost authored at least 21 papers between 1996 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2021
Genetically optimized massively parallel binary neural networks for intrusion detection systems.
Comput. Commun., 2021

Massively parallel binary neural network inference for detecting ships in FPGA systems on the edge.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020
Resource-optimized combinational binary neural network circuits.
Microelectron. J., 2020

Message from the Program Chairs.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
Online VHDL Generator and Analysis Tool.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

2017
Pipeline circuit synthesis from Python code.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

2015
Configurable hardware components generator in Python.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015

2014
Resolving Collision in EPCglobal Class-1 Gen-2 System by Utilizing the Preamble.
IEEE Trans. Wirel. Commun., 2014

Remote laboratory for testing processor cores in FPGA device.
Proceedings of the 37th International Convention on Information and Communication Technology, 2014

2012
Verification structures for design of video processing circuits.
Proceedings of the 2012 Proceedings of the 35th International Convention, 2012

2011
A modelling-based methodology for evaluating the performance of a real-time embedded control system.
Simul. Model. Pract. Theory, 2011

LGMD-based bio-inspired algorithm for detecting risk of collision of a road vehicle.
Proceedings of the 7th International Symposium on Image and Signal Processing and Analysis, 2011

Logic emulators in digital systems education.
Proceedings of EUROCON 2011, 2011

2009
From high-level real-time software design to low level hardware simulation: a methodology to evaluate performances of control embedded systems.
Proceedings of the 9th IFAC Workshop on Programmable Devices and Embedded Systems, 2009

2008
A Methodology for Supporting System-Level Design Space Exploration at Higher Levels of Abstraction.
J. Circuits Syst. Comput., 2008

2003
HW/SW Codesign of the MPEG-2 Video Decoder.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2000
Educational Programmable Hardware Prototyping and Verification System.
Proceedings of the Field-Programmable Logic and Applications, 2000

Reusable DSP Functions in FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
HW/SW Co-Simulation of Target C++ Applications and Synthesizable HDL with Performance Estimation.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
Programmabel Prototyping System for Image Processing.
Proceedings of the Field-Programmable Logic and Applications, 1998

1996
An Experimental Programmable Environment for Prototyping Digital Circuits.
Proceedings of the Field-Programmable Logic, 1996


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