Roman Kuznar

According to our database, Roman Kuznar authored at least 5 papers between 1993 and 1996.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1996

An Experimental Programmable Environment for Prototyping Digital Circuits.

Andrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc

Proceedings of the Field-Programmable Logic, 1996

1995

PROP: a recursive paradigm for area-efficient and performance oriented partitioning of large FPGA netlists.

Roman Kuznar, Franc Brglez

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions.

Roman Kuznar, Baldomir Zajc, Franc Brglez

Proceedings of the Proceedings EURO-DAC'94, 1994

Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and Interconnect.

Roman Kuznar, Franc Brglez, Baldomir Zajc

Proceedings of the 31st Conference on Design Automation, 1994

1993

Cost Minimization of Partitions into Multiple Devices.

Roman Kuznar, Franc Brglez, Krzysztof Kozminski

Proceedings of the 30th Design Automation Conference. Dallas, 1993